The present invention relates to an image sensor, especially, to an image sensor provided with plural pixel circuits arranged in plural rows and plural columns.
In the past, a general camera was dominated by a film type camera, however, in recent days, it has been replaced with a digital type camera. The image quality of a digital camera has been improved remarkably, and the newest model digital camera outperforms the film camera. An image sensor of a CCD system or a CMOS system is mounted in the digital camera.
Generally, the image sensor is provided with a pixel array unit, a vertical scanning circuit, a voltage level shift circuit, a column circuit, a horizontal scanning circuit, an output circuit, and a timing generator (for example, refer to Patent Literature 1). The pixel array unit includes plural pixels arranged in the shape of a matrix. Each pixel converts incident light into an electrical signal. The scanning circuit selects each pixel according to a control signal from the timing generator, and the electrical signal generated by each pixel is read via the column circuit, and is outputted to the exterior of the output circuit.
The vertical scanning circuit is configured with an address decoder etc., performs a selection scan of pixels of the pixel array unit in units of rows, based on the address signal supplied from the timing generator, and outputs plural control signals (a transfer signal, a reset signal, and a selection signal) of a logic circuit level to the selected line. The voltage level shift circuit supplies the control signals of the logic circuit level outputted from the vertical scanning circuit to plural pixels of the selected line via the control signal line, after a voltage of the control signals is shifted to the voltage of a pixel driving level.
In an image sensor of the CMOS system, a rolling electronic shutter system is adopted at the time of dynamic image photography. In the rolling electronic shutter system, it is necessary to select a read row and a shutter row (pixel reset row) which are mutually different, in the same one horizontal period (refer to FIG. 8). In order to fully send out a charge (electron) accumulated on a pixel, a pixel reset may be performed plural times, and plural addresses may have to be selected. Therefore, the vertical scanning circuit includes a read address decoder and plural reset address decoders.
Each address decoder includes a row selection decoder and a forming circuit. The row selection decoder selects a row corresponding to the address supplied from the timing generator. The forming circuit generates a control signal, based on a row selection signal which indicates the selected row and on a forming signal which sets up the timing to activate the selected row.
In Patent Literature 2, the circuit scale of a driving unit in an image sensor for performing parallel control of plural rows in a pixel array is suppressed. Specifically, plural row control signals are generated corresponding to plural bits at an active level in a decode signal stored in the storage unit, and are outputted to plural rows of a pixel array in parallel. Accordingly, it is possible to perform parallel control of plural rows by a single driving unit (a vertical scanning circuit); therefore, the circuit scale of the driving unit is suppressed.